About This Course
This course provides a better understanding of IO testing and IO DV(Design Verification) in ATE environment.
It explains in depth concepts, terminology, information on how to develop and implement tests for opens and shorts, IO pin leakage, ISB, input voltage and output voltage tests. It also provides IO DV definitions of commonly used parameters related to I/O signal pins and how these parameters are characterized in an ATE environment.
Successful students will be able to:
- Understand I/O tests in High-Volume Testing
- Understand why I/O Design Verification (DV) is required and how to perform basic I/O DV on a tester
A Product or Test Engineer with more than a year's experience or relevant exposure (e.g debug engineer, failure analysis engineer, production engineer, etc.)
IO Testing : Introduction
Fundamentals of DC Parametric Tests
Design for Test (DFT) Overview of JTAG Archit
Boundary Scan in IO Tests
Communication Protocol : SPI BUS Overview
Communication Protocol : I2C BUS Overview
Importance of I/O Design Validation
Basic of I/O DV Parameter