This program provides an opportunity for participants to acquire comprehensive technical and industry-relevant insights into the VLSI IC Design arena as well as provide a basic understanding and holistic view of the complete VLSI chip design flow. Upon completion of this program, participants will know the different aspects and phases of the complete IC design flow. These include the basics of design library, logic simulation and synthesis, floor plan, place and route, Design for Manufacturability, design verification, Design for Testability, and low power design methodologies. Participants will also be exposed to the dependencies and links across various design phases and this will help them to comprehend how decisions made in one phase affects the other and how they can handle the details of each design phase.

Target Audience

EEE Engineers working in the field of IC design (with 0 – 3 years of work experience), Customer Support Engineers, and Program Managers


Participants must have some basic engineering know-how