This course is designed to support IC test design engineers by providing a comprehensive technical and industry-relevant insights into IC design verification and Design for Testability (DFT) flow. It will enable participants to understand the basics involved in various phases of IC design development with emphasis on design verification, faults, DFT, and an appreciation of the links and dependencies across them.

Participants will be able to understand the role and importance of IC design verification and DFT and identify key issues and challenges involved. Various design verification and DFT methodologies will be shared and participants will also be exposed to issues cited from real industry experience. This course will be delivered by a senior VLSI consultant with extensive exposure in supporting and managing IC projects on a global scale.

Target Audience

IC design, IC test design engineers with 0 – 2 years of experience


Participants must have some basic engineering know-how